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  • E. Swankowski, N. Vijaykrishnan, R. Brooks, M. Kandemir, M. J. Irwin, Symmetric Encryption in Reconfigurable and Custom Hardware, Inter. Journal of Embedded Systems, 1(3/4):205-217, 2005.
  • G. Chen and M. Kandemir, Code restructuring for improving cache performance of MPSoCs, Proc. International Conference on Computer Aided Design, pp. 271-274, Nov. 2005.
  • Y. Tsai, N. Vijaykrishnan, Three-dimensional Cache Design using 3DCacti, Proc. of ICCD'05, Oct. 2005.
  • G. Chen and M. Kandemir, Optimizing inter-processor data locality on embedded chip multiprocessors, Proc. ACM International Conference on Embedded Software, pp. 227-236, Sep. 2005.
  • M. Kandemir, Improving Whole-program Locality using Intra-procedural and Inter-procedural Transformations, Journal of Parallel and Distributed Computing, 65(7):564-582, July 2005.
  • J. Kim, D. Park, T. Theocharides, N. Vijaykrishnan, C. R. Das, A Low Latency Router Supporting Adaptivity for On-Chip Interconnects, Proc. of the 42nd DAC, June 2005.
  • J. Lee, N. Vijaykrishnan, M. J. Irwin, High Performance Array Processor for Video Decoding, Proc. of ISVLSI'05, pp. 28-33, May 2005.
  • H. Saputra, O. Ozturk, N. Vijaykrishnan, M. Kandemir, R. Brooks, A Data-Driven Approach for Embedded Security, Proc. of ISVLSI'05, pp. 104-109, May 2005.
  • G. Chen and M. Kandemir, Optimizing address code generation for array-intensive DSP applications, Proc. International Symposium on Code Generation and Optimization, pp. 141-152, Mar. 2005.
  • T. Theocharides, G. Link, N. Vijaykrishnan, M. J. Irwin, Implementing LDPC Decoding on Network-on-Chip, Proc. of VLSI Design, pp. 134-137, Jan. 2005.

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