The broad topic of my research focuses on reliable architectures. The aim is to offer high pay off reliability with low overhead. This has branched into two main areas to date 1) Compensating for temperature induced clock skew and 2) Register file reliability
1) Temperature compensated clocks
Mosin Mondal,
Andrew J. Ricketts, Sami Kirolos, Tamer Ragheb, Greg Link, Vijaykrishnan Narayanan and Yehia Massoud , “Mitigating Thermal Effects on Clock Skew with Dynamically Adaptive Drivers,” Proc. of the IEEE Symposium on Quality Electronic Design, ISQED, 2007.
Mosin Mondal,
Andrew J. Ricketts, Sami Kirolos, Tamer Ragheb, Greg Link, Vijaykrishnan Narayanan and Yehia Massoud, “Thermally Robust Clocking Schemes for 3D Integrated Circuits,” Proc. of the IEEE Design Automation and Test in Europe, DATE, 2007.
2) Register file reliability
Andrew J. Ricketts, Madhu Mutyam, N. Vijaykrishnan, Mary Jane Irwin, “Investigating Simple Low Latency Reliable Multiported Register Files,” Proc. Of the IEEE Symposium on VLSI, 2007.
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