Soumya Eachempati
I am Doctoral candidate under
Dr. Vijaykrishnan Narayanan and
Dr. Yuan Xie in the
Department of Computer Science and Engineering at
The Pennsylvania State University, since Fall 2005. I completed my under-graduation in
Computer Science and Engineering at
Indian Institute of Technology, Madras, India. My research interests include chip multi-processors, design of FPGAs, on-chip interconnection networks and emerging technologies. Currently I'm looking at on-chip interconnection networks.
Contact Information
- Address: IST 354B
- Email: eachempa[at]cse[dot]psu[dot]edu
Conference Publications:
[1] Dongkook Park,
S. Eachempati, Reetuparna Das, Asit Mishra, N. Vijaykrishnan, Yuan Xie, Chita R Das, MIRA: A Multi-Layered On-Chip Interconnect Router Architecture,
To appear in Proc. of ISCA'08, June 2008.
[2]
S. Eachempati, Arthur Nieuwoudt, N. Vijaykrishnan, Y. Massoud, Impact of Process Variations on Carbon Nanotube Bundle Interconnect for Future FPGA Architectures,
Proc. of ISVLSI'07, May. 2007
pdf.
[3]
S. Eachempati, Arthur Nieuwoudt, A. Gayasen, N. Vijaykrishnan, Y. Massoud, Assessing Carbon Nanotube Bundle Interconnect for Future FPGA Architectures,
Proc. of DATE'07, April. 2007
pdf.
[4] R. Manimeghalai,
E.Siva Soumya, V. Muralidharan, B. Ravindran, V. Kamakoti, Placement and Routing for 3D-FPGAs using Reinforcement Learning and Support Vector Machines,
Proc. of VLSID'05, Jan 2005
pdf.
Journal Submissions:
[1] S. Eachempati, Arthur Nieuwoudt, N. Vijaykrishnan, Y. Massoud, Predicting the Performance and Reliability of Future FPGA Architectures with Carbon Nanotube Bundle Interconnect,
under review in
IEEE Transactions on Very Large Scale Integrated Systems, August 2007.
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